Hardware managed ring buffers are often used to accelerate communication between two processing elements, or among hardware devices and processing elements. These ring buffers implement a FIFO queue using a producer-consumer model, allowing a producer to enqueue an entry with a simple write and without the need to acquire a lock around the queue data structure. These ring buffers similarly enable a consumer to dequeue the entry from the head-of-queue without acquiring a lock.
Multiple producers can write into the same ring atomically, and multiple consumers can read from the same ring atomically, without any need for those agents to interact with each other. Instead, hardware provides the atomicity transparently. Typically a pointer (address) to a descriptor or to a buffer is passed in the ring, although rings can be used to pass small messages directly as well.